Abstract
Dynamic logic vogue is principally used for top fan in and high performance circuits thanks to its smaller space and quick superior speed. This vogue comes with a retardant of low noise margin that makes it a lot of liaable to noise than static CMOS circuits. It conjointly faces some charge sharing and escape issues. A little quantity of noise at the input will cause associate degree undesirable modification at the output. Domino logic (dynamic logic with associate degree electrical converter at the output) conjointly faces this drawback. This paper consist of an summary of assorted noise tolerant techniques for dynamic logic explaining their functioning and responsiveness for combating noise.
Keywords
Delay, Technology, Scaling,Threshold, voltage, Power consumption, Noise, Immunity, Leakage tolerance, Diode flat- footed domino
Citations
IRE Journals:
Ankul Gautam , Durgesh Kumar
"A Review On Dynamic CMOS Logic Noise Tolerant Techniques" Iconic Research And Engineering Journals Volume 2 Issue 10 2019 Page 11-15
IEEE:
Ankul Gautam , Durgesh Kumar
"A Review On Dynamic CMOS Logic Noise Tolerant Techniques" Iconic Research And Engineering Journals, 2(10)
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