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Identification of Dynamic Performance, Power, and Resource Management in Chip of Multiprocessors

Priya Mishra

Subject area: Science,Engineering and Technology  ·  Area of research: Computer Science

Abstract

Multicore CPUs are currently supported by all modern electronic gadgets. Power management, on the other hand, is one of the most important aspects of today's microprocessor architecture. The purpose of power management is to get the most out of a limited amount of energy. Power management strategies must strike a compromise between the pressing requirement for better performance/throughput and the negative thermal impacts of aggressive power usage. This study involves into the fundamentals of multicore processors, as well as current research topics in the field, before focusing on power management concerns in multicore architectures. This paper's main goal is to survey and explain existing power management approaches. Microprocessor performance has risen at an exponential rate in recent years. Parallelism has been achieved via a variety of techniques, including pipelining, super- scalar architectures, and chip multiprocessors or multicore processors. We discuss the many degrees of parallelism and how subsequent technologies attempted to leverage each level in this paper. Reactive and predictive power management strategies are the two primary kinds of developed power management techniques. The technique reacts to changes in workload performance in reactive approaches. In other words, a workload may contain phases that need high performance, as well as ones that require I/O delays and poor performance. When the workload status changes, the method adjusts to the new situation. Predictive approaches, on the other hand, can help to solve this problem. Those strategies detect workload phase changes before they occur, allowing them to intervene quickly before a program's phase changes. As a consequence, you get the best energy saving and performance outcomes.

Keywords

Multi-core Architecture, Parallelism, Super-Scalar Architecture, Reactive and Predictive Power Management

References

[1] K. M. Attia, M. A. El-Hosseini and H. A. Ali, "Dynamic power management techniques," Ain Shams Engineering Journal, vol. 8, no. 1, pp. 445-456, 2017.

[2] N. Kulkarni, G. Gonzalez-Pumariega, A. Khurana and C. A. Shoemaker, "CuttleSys: Data- Driven Resource Management for Interactive Services on Reconfigurable Multicores," 53rd Annual IEEE/ACM International Symposium on Microarchitecture, vol. 1, no. 1, pp. 650-664, 2020.

[3] K. Moazzemi, A. Kanduri, D. Juh ́asz and A. Miele, "Trends in On-Chip Dynamic Resource Management," IEEE, vol. 1, no. 1, pp. 1-8, 2021.

[4] M. G. Moghaddam, W. Guan and C. Ababei, "Dynamic Energy Optimization in Chip Multiprocessors Using Deep Neural Networks," IEEE TRANSACTIONS ON MULTI -SCALE COMPUTING SYSTEMS, vol. 4, no. 4, pp. 649- 661, 2018.

[5] Manakkadu, Sheheeda, Sourav Dutta, and Nazeih M. Botros. "Power aware parallel computing on asymmetric multiprocessor." In 2014 27th IEEE International System-on-Chip Conference (SOCC), pp. 35-40. IEEE, 2014.

[6] A. Bhattacharjee and M. Martonosi, "Thread Criticality Predictors for Dynamic Performance Power, and Resource Management in Chip Multiprocessors," IEEE, vol. 1, no. 1, pp. 1 -12, 2021.

[7] Sam Van den Steen, S. Eyerman, S. D. Pestel and M. Mechri, "Analytical Processor Performance and Power Modeling Using Micro-Architecture Independent Characteristics," IEEE TRANSACTIONS ON COMPUTERS, vol. 65, no. 12, pp. 3537-3551, 2016.

[8] Mariam Manakkadu, Sheheeda. "POWER - AWARE PERFORMANCE OPTIMIZATION ON MULTICORE ARCHITECTURES."

[9] S. V. d. Steen, S. D. Pestel and M. Mechri, "Micro-Architecture Independent Analytical Processor Performance and Power Modeling," IEEE, vol. 25, no. 4, pp. 32-41, 2015.

[10] Carlson, Trevor E., Wim Heirman, and Lieven Eeckhout. "Sniper: Exploring the level of abstraction for scalable and accurate parallel multi-core simulation." In Proceedings of 2011 International Conference for High Performance Computing, Networking, Storage and Analysis, pp. 1-12. 2011.

[11] Heirman, Wim, Souradip Sarkar, Trevor E. Carlson, Ibrahim Hur, and Lieven Eeckhout. "Power-aware multi-core simulation for early design stage hardware/software co - optimization." In Proceedings of the 21st international conference on Parallel architectures and compilation techniques, pp. 3- 12. 2012.

[12] Jha, Sudhanshu Shekhar, Wim Heirman, Ayose Falcón, Jordi Tubella, Antonio González, and Lieven Eeckhout. "Shared resource aware scheduling on power-constrained tiled many- core processors." Journal of Parallel and Distributed Computing 100 (2017): 30-41.

[13] Jha, Sudhanshu Shekhar, Wim Heirman, Ayose Falcón, Jordi Tubella, Antonio González, and Lieven Eeckhout. "Shared resource aware scheduling on power-constrained tiled many- core processors." Journal of Parallel and Distributed Computing 100 (2017): 30-41.

How to cite this paper

Priya Mishra "Identification of Dynamic Performance, Power, and Resource Management in Chip of Multiprocessors" Iconic Research And Engineering Journals Volume 6 Issue 1 2022 Page 543-548
Priya Mishra "Identification of Dynamic Performance, Power, and Resource Management in Chip of Multiprocessors" Iconic Research And Engineering Journals, vol. 6, no. 1, Jul. 2022
Priya Mishra (2022). Identification of Dynamic Performance, Power, and Resource Management in Chip of Multiprocessors. Iconic Research And Engineering Journals, 6(1).
Priya Mishra "Identification of Dynamic Performance, Power, and Resource Management in Chip of Multiprocessors" Iconic Research And Engineering Journals, vol. 6, no. 1, Jul. 2022.
@article{1703694,
      author = {Priya Mishra},
      title = {Identification of Dynamic Performance, Power, and Resource Management in Chip of Multiprocessors},
      journal = {Iconic Research And Engineering Journals},
      year = {2022},
      volume = {6},
      number = {1},
      pages = {543-548},
      issn = {2456-8880},
      url = {https://www.irejournals.com/formatedpaper/1703694.pdf},
      abstract = {Multicore CPUs are currently supported by all modern electronic gadgets. Power management, on the other hand, is one of the most important aspects of today's microprocessor architecture. The purpose of power management is to get the most out of a limited amount of energy. Power management strategies must strike a compromise between the pressing requirement for better performance/throughput and the negative thermal impacts of aggressive power usage. This study involves into the fundamentals of multicore processors, as well as current research topics in the field, before focusing on power management concerns in multicore architectures. This paper's main goal is to survey and explain existing power management approaches. Microprocessor performance has risen at an exponential rate in recent years. Parallelism has been achieved via a variety of techniques, including pipelining, super- scalar architectures, and chip multiprocessors or multicore processors. We discuss the many degrees of parallelism and how subsequent technologies attempted to leverage each level in this paper. Reactive and predictive power management strategies are the two primary kinds of developed power management techniques. The technique reacts to changes in workload performance in reactive approaches. In other words, a workload may contain phases that need high performance, as well as ones that require I/O delays and poor performance. When the workload status changes, the method adjusts to the new situation. Predictive approaches, on the other hand, can help to solve this problem. Those strategies detect workload phase changes before they occur, allowing them to intervene quickly before a program's phase changes. As a consequence, you get the best energy saving and performance outcomes.},
      keywords = {Multi-core Architecture, Parallelism, Super-Scalar Architecture, Reactive and Predictive Power Management},
      month = {July},
  }