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LOW POWER FULL SWING SRAM ARCHITECTURE WITH POWER GATING
Subject area: Science,Engineering and Technology · Area of research: ECE
Abstract
The attacks in the field of power analysis is becoming a major threat to security systems by triggering secret data extraction using side channel leakage information .Nowadays almost every Memory in Embedded systems, is now utilizing 8T and 6T SRAM cells, it is one of the major components in many systems .Generally SRAM cells are likely to suffer from side channel leakage power attacks .To overcome this types of attacks, we proposed a 9T SRAM which has one additional transistor compared to 8T cell and incorporates three more transistor when compared to 6T SRAM cell which greatly improves the number of operations per second in SRAM interms of speed and the power is also decreased The cells were implemented in 125nm technology on Tanner EDA tool.
Keywords
Static Random Access Memory (SRAM), Side Channel Attacks (SCA), Leakage Power Analysis (LPA)
How to cite this paper
@article{1701151,
author = {A.Ashna, M.Farous Khan, T.G.Karthikeyan, R.Arun Raj},
title = {LOW POWER FULL SWING SRAM ARCHITECTURE WITH POWER GATING},
journal = {Iconic Research And Engineering Journals},
year = {2019},
volume = {2},
number = {10},
pages = {225-229},
issn = {2456-8880},
url = {https://www.irejournals.com/formatedpaper/1701151.pdf},
abstract = {The attacks in the field of power analysis
is becoming a major threat to security systems by triggering secret data extraction using side channel leakage information .Nowadays almost every Memory in Embedded systems, is now utilizing 8T and 6T SRAM cells, it is one of the major components in many systems .Generally SRAM cells are likely to suffer from side channel leakage power attacks .To overcome this types of attacks, we proposed a 9T SRAM which has one additional transistor compared to 8T cell and incorporates three more transistor when compared to 6T SRAM cell which greatly improves the number of operations per second in SRAM interms of speed and the power is also decreased The cells were implemented in 125nm technology on Tanner EDA tool.
},
keywords = {Static Random Access Memory (SRAM), Side Channel Attacks (SCA), Leakage Power Analysis (LPA)},
month = {April},
}