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1714537 Vol 9 · Issue 8 Download Paper

Intelligent Traffic Management System Using VLSI and Python GUI

S. Lalitha S. A. Siva K. K. Tharun G. Yohendra Prakash

Subject area: Science,Engineering and Technology  ·  Area of research: Smart Traffic Control

DOI: https://doi.org/10.64388/IREV9I8-1714537

Abstract

This invention concerns the development of an intelligent traffic management system utilizing Very Large Scale Integration (VLSI) concepts to replace traditional hardware-dependent controllers. The traffic control logic is developed using a Finite State Machine (FSM) architecture and implemented in Verilog HDL, providing precise signal timing and reliable state transitions. An embedded simulation environment built on ModelSim ensures real-time logic verification and waveform analysis without the need for expensive physical hardware. The system integrates advanced visualization through a Python-based Graphical User Interface (GUI), which continuously monitors and displays the simulated traffic signal status in real-time. Power consumption and hardware complexities are significantly reduced by utilizing a simulation-first approach. Firmware logic handles sequential state transitions, timer limits, and safety interlocks between conflicting traffic lanes. A modular software design supports scalable traffic intersection layouts and ensures safe, conflict-free signal operation. This invention demonstrates a highly reliable, low-cost, and scalable embedded electronics platform for modern smart city traffic control applications.

Keywords

VLSI design, Finite State Machine (FSM), Verilog HDL, ModelSim Simulation, Python GUI, Smart Traffic Control, Embedded Logic, Waveform Analysis.

References

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[2] S. Patel and V. Sharma, “Intelligent Traffic Control System Using Verilog HDL,” in Proceedings of the IEEE International Conference on Smart Electronics, pp. 78–83, 2019.

[3] M. Singh and P. Rao, “VLSI-Based Smart Traffic Light Controller for Urban Intersections,” Journal of Embedded Systems, vol. 7, no. 4, pp. 210–218, 2020.

[4] A. Sharma and K. Gupta, “Simulation of Traffic Signal Control Using FSM and Waveform Analysis,” International Journal of Engineering Research, vol. 10, no. 4, pp. 65–72, 2021.

[5] N. Weste and D. Harris, CMOS VLSI Design: A Circuits and Systems Perspective, 4th ed., Boston, MA: Addison-Wesley, 2011.

[6] A. Brown and D. Wilson, “Python-based visualization for embedded logic systems,” Embedded Systems Letters, vol. 13, no. 1, pp. 25–28, 2022.

[7] P. Mehta and S. Iyer, “Low-power embedded system design for smart city applications,” in Proceedings of the International Conference on Smart Computing Systems, pp. 112–118, 2021.

[8] T. Anderson and K. Lee, “Advanced Verilog HDL Simulation Techniques Using ModelSim,” Journal of Digital Logic Design, vol. 14, no. 2, pp. 88–95, 2020.

[9] L. Zhang and N. Verma, “Scalable traffic intersection models using Hardware Description Languages,” IEEE Transactions on Intelligent Transportation Systems, vol. 22, no. 6, pp. 3450–3459, 2021.

[10] R. Gupta and M. Patel, “Real-time Graphical User Interfaces for VLSI Verification using Python,” Journal of Hardware-Software Co-Design, vol. 9, no. 3, pp. 210–217, 2023.

[11] P. Karthik and V. Natarajan, “FPGA Implementation of an Adaptive Traffic Light Controller using Verilog,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 25, no. 8, pp. 2341–2349, 2021.

[12] M. S. Kumar and R. Baskar, “Optimization of Traffic Signal Control using Finite State Machine,” International Journal of Computer Applications, vol. 182, no. 41, pp. 12–18, 2020.

[13] D. Anand and S. Ramesh, “Developing Real-Time Interactive Dashboards for Hardware Simulations using Python,” Journal of Open Source Software, vol. 6, no. 60, pp. 3021–3027, 2022.

[14] K. J. Priya and A. L. N. Rao, “Functional Verification of Complex Digital Systems using ModelSim,” International Journal of Electronics and Communication Engineering, vol. 14, no. 2, pp. 45–53, 2019.

[15] V. S. Rajan and T. R. Prasad, “Smart City Infrastructure: Low-Power Embedded Architectures for Urban Traffic Management,” Journal of Sustainable Transportation Systems, vol. 8, no. 1, pp. 104–112, 2023.

How to cite this paper

S. Lalitha, S. A. Siva, K. K. Tharun, G. Yohendra Prakash "Intelligent Traffic Management System Using VLSI and Python GUI" Iconic Research And Engineering Journals Volume 9 Issue 8 2026 Page 1700-1706 https://doi.org/10.64388/IREV9I8-1714537
S. Lalitha, S. A. Siva, K. K. Tharun, G. Yohendra Prakash "Intelligent Traffic Management System Using VLSI and Python GUI" Iconic Research And Engineering Journals, vol. 9, no. 8, Feb. 2026, doi: https://doi.org/10.64388/IREV9I8-1714537
S. Lalitha, S. A. Siva, K. K. Tharun, G. Yohendra Prakash (2026). Intelligent Traffic Management System Using VLSI and Python GUI. Iconic Research And Engineering Journals, 9(8). doi: https://doi.org/10.64388/IREV9I8-1714537
S. Lalitha, S. A. Siva, K. K. Tharun, G. Yohendra Prakash "Intelligent Traffic Management System Using VLSI and Python GUI" Iconic Research And Engineering Journals, vol. 9, no. 8, Feb. 2026. Crossref, https://doi.org/10.64388/IREV9I8-1714537
@article{1714537,
      author = {S. Lalitha, S. A. Siva, K. K. Tharun, G. Yohendra Prakash},
      title = {Intelligent Traffic Management System Using VLSI and Python GUI},
      journal = {Iconic Research And Engineering Journals},
      year = {2026},
      volume = {9},
      number = {8},
      pages = {1700-1706},
      issn = {2456-8880},
      url = {https://www.irejournals.com/formatedpaper/1714537.pdf},
      abstract = {This invention concerns the development of an intelligent traffic management system utilizing Very Large Scale Integration (VLSI) concepts to replace traditional hardware-dependent controllers. The traffic control logic is developed using a Finite State Machine (FSM) architecture and implemented in Verilog HDL, providing precise signal timing and reliable state transitions. An embedded simulation environment built on ModelSim ensures real-time logic verification and waveform analysis without the need for expensive physical hardware. The system integrates advanced visualization through a Python-based Graphical User Interface (GUI), which continuously monitors and displays the simulated traffic signal status in real-time. Power consumption and hardware complexities are significantly reduced by utilizing a simulation-first approach. Firmware logic handles sequential state transitions, timer limits, and safety interlocks between conflicting traffic lanes. A modular software design supports scalable traffic intersection layouts and ensures safe, conflict-free signal operation. This invention demonstrates a highly reliable, low-cost, and scalable embedded electronics platform for modern smart city traffic control applications.},
      keywords = {VLSI design, Finite State Machine (FSM), Verilog HDL, ModelSim Simulation, Python GUI, Smart Traffic Control, Embedded Logic, Waveform Analysis.},
      month = {February},
      doi = {https://doi.org/10.64388/IREV9I8-1714537}
  }