Design and Simulation of a Miniaturized CMOS Compatible Coplanar Waveguide Bandpass Filter for 5G Millimetre-wave Application

• Author(s): Bello O. Lawal; Cheab Sovuthy; Isah M. M
• Paper ID: 1711457
• Page: 1812-1826
• Published Date: 04-11-2025
• Published In: Iconic Research And Engineering Journals
• Publisher: IRE Journals
• e-ISSN: 2456-8880
• Volume/Issue: Volume 9 Issue 4 October-2025

Abstract

The current CMOS millimetre-wave filters are implemented using microstrip technology. Thus, they are characterised by high losses due to parasitic effects and large-distributed capacitance resulting from coupling effects. We present the design of a miniaturised CMOS compatible coplanar waveguide bandpass filter for a 5G millimetre-wave application. The bandpass filter consists of a third order Combline structure loaded with interdigitated capacitors and a coplanar ground plane. The miniaturised bandpass filter is theoretically modelled and simulated for compatibility with the standard CMOS process technology to significantly reduce design complexity, to achieve a high-performance filter with minimised signal losses of insertion loss (IL) less than 2dB, return loss (RL) better than 10 dB, with good selectivity, low cost, compact size, low weight, and high linearity. The theoretical parameters of the bandpass filter are calculated using MAPLE software based on mathematical modelling equations of Combline structure and the ideal transmission line schematic model in ADS used to predict the performance of the filter. The CMOS process technology due to its high monolithic integration level and low-cost implementation for batch fabrication makes it a good candidate for achieving low cost and high-performance filter. The theoretical and ideal schematic model results of the miniaturised CMOS bandpass filter show an insertion loss of 0dB and return loss better than 20 dB at 60 GHz. The filter is simulated for compatibility with the standard 0.18?m CMOS process technology using HFSS finite element analysis (FEA) to confirm its performance. The simulated result obtained for a single metal layer of the miniaturised bandpass filter shows an insertion loss of 0.03 dB, return loss better than 29 dB at a centre frequency of 60 GHz and occupy a total chip area of the 580.6 ?m x 334.7 ?m with a core size of 400.6 ?m x 127.7 ?m. While the optimised three metal layers model with CMOS design rules consideration shows an insertion loss of 0.45 dB and return loss better than 10.8 dB at 60 GHz with a core size of 439.6 ?m x 127.7 ?m. Abstract- Mention the abstract for the article. An abstract is a brief summary of a research article, thesis, review, conference proceeding or any in-depth analysis of a particular subject or discipline, and is often used to help the reader quickly ascertain the paper's purpose. When used, an abstract always appears at the beginning of a manuscript, acting as the point-of-entry for any given scientific paper or patent application.

Keywords

Coplanar waveguide, Bandpass, 5G, Combline, CMOS.

Citations

IRE Journals:
Bello O. Lawal, Cheab Sovuthy, Isah M. M "Design and Simulation of a Miniaturized CMOS Compatible Coplanar Waveguide Bandpass Filter for 5G Millimetre-wave Application" Iconic Research And Engineering Journals Volume 9 Issue 4 2025 Page 1812-1826 https://doi.org/10.64388/IREV9I4-1711457-8358

IEEE:
Bello O. Lawal, Cheab Sovuthy, Isah M. M "Design and Simulation of a Miniaturized CMOS Compatible Coplanar Waveguide Bandpass Filter for 5G Millimetre-wave Application" Iconic Research And Engineering Journals, 9(4) https://doi.org/10.64388/IREV9I4-1711457-8358